Publikationen, an denen er mitarbeitet ARMANDO FERMIN ASTARLOA CUELLAR (74)

2024

  1. AXI Lite Redundant On-Chip Bus Interconnect for High Reliability Systems

    IEEE Transactions on Reliability, Vol. 73, Núm. 1, pp. 602-607

  2. Frente a la moda de la enseñanza en subgrupos pequeños, el potencial del aprendizaje individual

    XVI Congreso de Tecnología, Aprendizaje y Enseñanza de la Electrónica (TAEE 2024). Libro de actas: XVI Conferência em Tecnologia, Aprendizagem e Ensino da Eletrónica (TAEE 2024). Livro de atas.XVI International Conference of Technology, Learning and Teaching of Electronics (TAEE 2024). Proceedings book

2023

  1. Time-Sensitive Networking to meet Hard-real Time Boundaries on Edge Intelligence Applications

    2023 38th Conference on Design of Circuits and Integrated Systems, DCIS 2023

2022

  1. Embedded firewall for on-chip bus transactions

    Computers and Electrical Engineering, Vol. 98

  2. Encryption AXI Transaction Core for Enhanced FPGA Security

    Electronics (Switzerland), Vol. 11, Núm. 20

  3. High-Performance Computing Architecture for Sample Value Processing in the Smart Grid

    IEEE Access, Vol. 10, pp. 12208-12218

2021

  1. A fixed-latency architecture to secure GOOSE and sampled value messages in substation systems

    IEEE Access, Vol. 9, pp. 51646-51658

  2. A survey on vulnerabilities and countermeasures in the communications of the smart grid

    Electronics (Switzerland), Vol. 10, Núm. 16

2020

  1. Electronic control board for student Rocket

    2020 35th Conference on Design of Circuits and Integrated Systems, DCIS 2020

  2. Secure Critical Traffic of the Electric Sector over Time-Sensitive Networking

    2020 35th Conference on Design of Circuits and Integrated Systems, DCIS 2020

2019

  1. Smart Sensor: SoC Architecture for the Industrial Internet of Things

    IEEE Internet of Things Journal, Vol. 6, Núm. 4, pp. 6567-6577

2018

  1. CPPS Gateway - Implementation of Modbus and Profibus on a SoC programmable platform

    IEEE Latin America Transactions, Vol. 16, Núm. 2, pp. 335-341

  2. Secure protocol and IP core for configuration of networking hardware IPs in the smart grid

    Energies, Vol. 11, Núm. 3

  3. System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SAS

    Proceedings - 33rd Conference on Design of Circuits and Integrated Systems, DCIS 2018

2017

  1. Cyber-Physical Production System Gateway Based on a Programmable SoC Platform

    IEEE Access, Vol. 5, pp. 20408-20417

  2. Estimating the SEU failure rate of designs implemented in FPGAs in presence of MCUs

    Microelectronics Reliability, Vol. 78, pp. 85-92

  3. MACsec layer 2 security in HSR rings in substation automation systems

    Energies, Vol. 10, Núm. 2

  4. On the Utilization of System-on-Chip Platforms to Achieve Nanosecond Synchronization Accuracies in Substation Automation Systems

    IEEE Transactions on Smart Grid, Vol. 8, Núm. 4, pp. 1932-1942

2016

  1. Cyber-security in substation automation systems

    Renewable and Sustainable Energy Reviews, Vol. 54, pp. 1552-1562

  2. Intelligent gateway for industry 4.0-compliant production

    IECON Proceedings (Industrial Electronics Conference)