Publicaciones en las que colabora con CLEMENTE RODRIGUEZ LAFUENTE (32)

2019

  1. Tasa de aciertos ideal y predecible para la transposición de matrices en caches de datos

    Avances en Arquitectura y Tecnología de Computadores: Actas de Jornadas SARTECO, Cáceres, 18 a 20 de septiembre de 2019| (Servicio de Publicaciones), pp. 172-181

2016

  1. Obtención del WCET óptimo con caches de instrucciones bloqueables (Lock-MS) en Otawa

    V Simposio de Sistemas de Tiempo Real (Ediciones Universidad de Salamanca), pp. 95-106

2015

  1. A predictable hardware to exploit temporal reuse in real-time and embedded systems

    Journal of Systems Architecture, Vol. 61, Núm. 5-6, pp. 227-238

  2. ACDC: Small, predictable and high-performance data cache

    ACM Transactions on Embedded Computing Systems, Vol. 14, Núm. 2, pp. 38

2013

  1. Optimizing a combined WCET-WCEC problem in instruction fetching for real-time systems

    Journal of Systems Architecture, Vol. 59, Núm. 9, pp. 667-678

2012

  1. A small and effective data cache for real-time multitasking systems

    Real-Time Technology and Applications - Proceedings

2010

  1. Combining prefetch with instruction cache locking in multitasking real-time systems

    Proceedings - 16th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2010

2008

  1. Avoiding the WCET overestimation on LRU instruction cache

    Proceedings - 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2008

2006

  1. Cut digits classification with k-NN multi-specialist

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

2005

  1. Noisy digit classification with multiple specialist

    Lecture Notes in Computer Science

2003

  1. Fast multistage algorithm for K-NN classifiers

    Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Vol. 2905, pp. 448-455

2002

  1. An incremental and hierarchical K-NN classifier for handwritten characters

    Proceedings - International Conference on Pattern Recognition

  2. Hierarchical classifiers based on neighbourhood criteria with adaptive computational cost

    Pattern Recognition, Vol. 35, Núm. 12, pp. 2761-2769

  3. Multidimensional multistage k-NN classifiers for handwritten digit recognition

    Proceedings - International Workshop on Frontiers in Handwriting Recognition, IWFHR

2001

  1. Low cost parallel solutions for the VRPTW optimization problem

    Proceedings of the International Conference on Parallel Processing Workshops, Vol. 2001-January, pp. 176-181

2000

  1. A High Eficiency Parallel Algorithm for the VRPTW Based on Simulated Annealing

    Proceedings of the Joint Conference on Information Sciences