Publicaciones (34) Publicaciones de JAGOBA ARIAS PEREZ

2010

  1. Neuro semantic thresholding using OCR software for high precision OCR applications

    Image and Vision Computing, Vol. 28, Núm. 4, pp. 571-578

2008

  1. LL-MAC: A low latency MAC protocol for wireless self-organised networks

    Microprocessors and Microsystems, Vol. 32, Núm. 4, pp. 197-209

2007

  1. Decompression dual core for SoPC applications in high speed FPGA

    IECON Proceedings (Industrial Electronics Conference)

  2. Energy aware medium access control protocols

    Wireless Communications Research Trends (Nova Science Publishers, Inc.), pp. 123-163

  3. GPS-less location algorithm for wireless sensor networks

    Computer Communications, Vol. 30, Núm. 14-15, pp. 2904-2916

  4. Hardware architecture for a general regression neural network coprocessor

    Neurocomputing, Vol. 71, Núm. 1-3, pp. 78-87

  5. High-precision DRM demodulator for remote monitoring

    IECON Proceedings (Industrial Electronics Conference)

  6. OSCRYB: Open source CRYpto-bridge for secure ethernet point-to-point industrial communications

    IECON Proceedings (Industrial Electronics Conference)

2006

  1. A design methodology for progressive families of devices

    WSEAS Transactions on Electronics, Vol. 3, Núm. 9, pp. 499-504

  2. Architecture of a real-time wavelet transform calculation SoPC core for industrial applications

    IECON Proceedings (Industrial Electronics Conference)

  3. Comparison of two designs for the multifunction vehicle bus

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

  4. Modifying slots in test vectors to validate decoders of a train network

    Second International Conference on Wireless and Mobile Communications, ICWMC 2006

  5. Node synchronization in wireless sensor networks

    Second International Conference on Wireless and Mobile Communications, ICWMC 2006

  6. Run-time reconfigurable hardware-software architecture for PID motor control IP cores

    IECON Proceedings (Industrial Electronics Conference)

  7. SOM Segmentation of gray scale images for optical recognition

    Pattern Recognition Letters, Vol. 27, Núm. 16, pp. 1991-1997

  8. Simulink/modelsim simulable VHDL PID core for industrial SoPC multiaxis controllers

    IECON Proceedings (Industrial Electronics Conference)

  9. Topics on power aware design

    WSEAS Transactions on Communications, Vol. 5, Núm. 2, pp. 327-334

2005

  1. A tiny microprocessor floating point implementation of a general regression neural network

    WSEAS Transactions on Computers, Vol. 4, Núm. 2, pp. 280-285

  2. Implementation of a modified Fuzzy C-Means clustering algorithm for real-time applications

    Microprocessors and Microsystems, Vol. 29, Núm. 8-9, pp. 375-380

  3. Multiprocessor SoPC-core for FAT volume computation

    Microprocessors and Microsystems, Vol. 29, Núm. 10, pp. 421-434