University of Cambridge-ko ikertzaileekin lankidetzan egindako argitalpenak (2)

2017

  1. Handling Physical-Layer Deadlock Caused by Permanent Faults in Quasi-Delay-Insensitive Networks-on-Chip

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 25, Núm. 11, pp. 3152-3165

2015

  1. Deadlock Recovery in Asynchronous Networks on Chip in the Presence of Transient Faults

    21ST IEEE INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS (ASYNC 2015)