Publications dans lesquelles il/elle collabore avec UNAI BIDARTE PERAITA (56)

2022

  1. Embedded firewall for on-chip bus transactions

    Computers and Electrical Engineering, Vol. 98

  2. Encryption AXI Transaction Core for Enhanced FPGA Security

    Electronics (Switzerland), Vol. 11, Núm. 20

2019

  1. Smart Sensor: SoC Architecture for the Industrial Internet of Things

    IEEE Internet of Things Journal, Vol. 6, Núm. 4, pp. 6567-6577

2018

  1. System-on-Programmable-Chip AES-GCM implementation for wire-speed cryptography for SAS

    Proceedings - 33rd Conference on Design of Circuits and Integrated Systems, DCIS 2018

2016

  1. Intelligent gateway for industry 4.0-compliant production

    IECON Proceedings (Industrial Electronics Conference)

  2. Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs

    Reliability Engineering and System Safety, Vol. 151, pp. 1-9

2015

  1. FPGA based nodes for sub-microsecond synchronization of cyber-physical production systems on high availability ring networks

    2015 International Conference on ReConFigurable Computing and FPGAs, ReConFig 2015

2014

  1. A Versatile FPGA Demonstration Platform for Academic Use

    Libro de actas del XI Congreso de tecnologías, aprendizaje y enseñanza de la electrónica, TAEE 2014: 11,12 y 13 de Junio de 2014. Universidad de Deusto. Bilbao

  2. A versatile FPGA demonstration platform for academic use

    Proceedings of XI Tecnologias Aplicadas a la Ensenanza de la Electronica (Technologies Applied to Electronics Teaching), TAEE 2014

  3. FPGA implemented cut-through vs store-and-forward switches for reliable ethernet networks

    Proceedings of the 2014 29th Conference on Design of Circuits and Integrated Systems, DCIS 2014

  4. Fast and accurate SEU-tolerance characterization method for Zynq SoCs

    Conference Digest - 24th International Conference on Field Programmable Logic and Applications, FPL 2014

2013

  1. System-on-Chip implementation of Reliable Ethernet Networks nodes

    IECON Proceedings (Industrial Electronics Conference)

2011

  1. I2CSec: A secure serial Chip-to-Chip communication protocol

    Journal of Systems Architecture, Vol. 57, Núm. 2, pp. 206-213

  2. Known-blocking. Synchronization method for reliable processor using TMR & DPR in SRAM FPGAs

    Proceedings of the 2011 7th Southern Conference on Programmable Logic, SPL 2011