A comprehensive latency profiling study of the Tofino P4 programmable ASIC-based hardware

1. Franco, D.
2. Ollora Zaballa, E.
3. Zang, M.
4. Atutxa, A.
5. Sasiain, J.
6. Pruski, A.
7. Rojas, E.
8. Higuero, M.
9. Jacob, E.

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DOI: 10.1016/J.COMCOM.2024.01.010 GOOGLE SCHOLAR lock_openOpen access editor

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